PhaseLink Announces the Availability of PhasorVTM (PL580-XX & PL680-XX) The 0.4ps Phase Jitter Performance All Purpose Clock

Up to 640 MHz frequency with less than 0.4ps RMS phase jitter, for all supported frequencies, makes the PhasorV product family the industry’s highest performance, lowest phase noise PLL clock. PhasorV family is a low-cost alternative to very expensive clock solutions, currently available in the market

Fremont, California. (PRWEB) October 3, 2005

Up to 640 MHz frequency with less than 0.4ps RMS phase jitter, for all supported frequencies, makes the PhasorV product family the industry's highest performance, lowest phase noise PLL clock. PhasorV family is a low-cost alternative to very expensive clock solutions, currently available in the market.

PhaseLink Corporation, a leader in frequency source generation and the inventor of the Analog Frequency MultipilerTM, today announced the availability of its 'Ultra-Low-phase noise' PhasorV clock family. The PhasorV is the newest member of PhaseLink's high performance XO and VCXO Timing Source ICs.

Operating at up to 640 MHz from a low-cost fundamental input crystal between 19MHz-40MHz, this family produces less than 0.4ps of phase jitter, offers a wide pull range of ± 200ppm, demonstrates the lowest phase noise and peak to peak jitter (25ps typical) of any of its rivals, and can output differential PECL, LVDS, or single ended CMOS.

The PhasorV is specifically designed to address the stringent demands of the telecom, networking, and storage markets, supporting a wide range of applications such as SONET/SDH, Ethernet, SATA, Fiber Channel, xPON, video, and other high performance markets.

“Our aim was to offer the highest output frequency with lowest phase noise and jitter of any similar product in the industry to reduce the bit error rate for our customers,” said Pierre Guebels, VP Engineering, PhaseLink Corporation. “We have already surpassed our customer's expectations with offering the best price/performance of any rival product”.

Performance Summary:

Phase Jitter (ps)Pullability (ppm)Carrier Freq. (MHz)Phase Noise (dBc)/Hz

10Hz100Hz1KHz10KHz

100KHz1M10M

0.4±200106.25-66-96-122-132-126-144-150

156.25-62-92-120-132-128-140-150

212.5-62-92-118-126-120-140-150

311.04-59-85-117-128-125-139-148

622.08-49-84-111-120-118-128-138

The PhasorV is offered in a small, 3x3 QFN or 16-pin TSSOP Pb (lead)-free packages for easy placement on space-constrained boards, and supports commercial (0 to +70 degrees C) and industrial (-40 to +85 degrees C) temperature ranges.

Evaluation boards and Gerber files for optimum placement of PhasorV is available from PhaseLink.

Pricing and Availability:

The PL580-30 is currently available in 3x3QFN and 16-pin TSSOP packages and is priced at $5 for moderate quantities.

PhasorV Datasheet

For more information on PhsorV products, please visit [http://www.phaselink.com].

About PhaseLink Corporation:

PhaseLink Corporation is the recognized leader in the mixed signal technology for timing source and signal conditioning ICs, in the area of Communications, Data Storage, Personal Computing, and Consumer Products. An innovator of many first to market products such as Analog Frequency Multipliers, Triangular Modulation SST, Bi-directional I/O latched Clock chip, SMART-BYTETM Programmable clock chip, etc.), PhaseLink offers one of the broadest IC product lines in the industry (XO, VCXO, Analog Frequency Multipliers, EMI reduction, programmable, Video, and LAN clocks).

Editorial Contact:

Ladan Saniee

PhaseLink Corporation

47745 Fremont Boulevard

Fremont, CA 94538

Phone: 510-492-0990 x230

Fax: 510-492-0991

http://www.phaselink.com

PhaseLink Corporation and the PhaseLink logo are registered trademarks of PhaseLink Corporation. Quick Turn Clock, Analog Frequency Multiplier, Triangular Modulation SST, Bi-directional I/O latched Clock chip, and SMART-BYTE are trademarks of PhaseLink Corporation. All other product names or company names are mentioned for identification purposes only, and may be trademarks of their respective owners.

###