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Fractional-N PLLs for next-generation mobile phones provide ultra fast hopping/lockup times
Fujitsu Microelectronics has introduced a new family of dual (RF and IF) PLLs designed for use in the next generations of mobile telephones, both 2.5G (GPRS and Edge), and 3G (UMTS).
London, June 28 2001 - Fujitsu Microelectronics has introduced a new family of dual (RF and IF) PLLs designed for use in the next generations of mobile telephones, both 2.5G (GPRS and Edge), and 3G (UMTS).
The family, the MB15F8xUL, comprises four devices, all of which offer exceptionally fast hopping/lockup times thanks to the use of a powerful technique, Fractional-N (Frac-N). For example, the fastest unit in the family, the MB15F88UL, features a hopping/lockup time of just 133 microseconds, and a phase noise of --80.37dBc/Hz (@ 1800MHz and 1KHz offset) with a spurious of --71.51dBc (@ 1800MHz and 400KHz offset)
Power consumption is low, ranging from 5.5mA to 6.5mA, and the PLLs are available in Fujitsus market-leading thin BCC-20 packaging, which results in a package only 0.6mm thick. The PLLs are also available in TSSOP packaging.
Frequency ranges provided by the PLLs span from 1.7GHz to 2.6GHz (RF), and 600MHz to 1.2GHz (IF). All four PLLs are available now, as is a full range of support tools such as development boards, and software manuals.
Frac-N PLLīs achieve faster hopping times than conventional Integer PLLs by increasing the number of comparisons made of the input signal to the reference frequency. The phase comparisons which occur during the "main period", (as integer PLL), are really in-phase, while the additional fractional phase comparisons create small error pulses, which produce fractional spurious. There are methods available to reduce these fractional spurious, but these methods have a big impact on the chip-size.
Fujitsu has developed its own approach, called SCCT Frac-N (Spurious Cancellation based on standardised Constant Time). This overcomes the problem of fractional spurious and results in a small cost-effective chip, which provides fast hopping during lockup and suppresses the spurious after the synthesiser has locked.
A further benefit is that spurious noise performance is less effected by variations in voltage and temperature, compared to some compensation techniques used in standard Frac-N PLLīs.
....ends (Ref: PR729)
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