Sarnoff Says TakeCharge IC Approach Shown To Produce Faster, More Robust Chips

High-Performance >5 GHz/10 Gbps RF Devices Made Possible by Elimination of Resistors in Signal Paths, Ultra-Low Capacitance

PRINCETON, NJ / GISTEL, BELGIUM (PRWEB) March 23, 2002 -Sarnoff Corporation, the inventor of the CMOS process, today announced that its TakeCharge technology for integrated circuit (IC) design has been shown to significantly improve device speed in the RF region while providing the protection against device failure lacking in other leading-edge designs. The improved RF performance IC is in addition to the ability of the TakeCharge approach to put more dies on each silicon wafer for higher per-wafer revenues.
The company made the announcement at the Design Automation Test Europe (DATE) conference in Paris, France. Sarnoff will also show TakeCharge at the Embedded Systems Conference (ESC) in San Francisco, March 12-15.
A major IC producer has already licensed TakeCharge to deliver better performance in the 5 gigahertz (GHz) range, with up to 10 gigabits per second (Gbps) bandwidth," said Koen G. Verhaege, Technical Director of Device Design at Sarnoff, and Executive Director at Sarnoff Europe. These results grow directly out of the TakeCharge design approach of eliminating series resistors in the signal path, thus improving speed, and achieving ultra-low parasitic capacitance (~100fF).
At the same time our approach provides protection against electrostatic discharge (ESD) induced failure that is lacking in many state-of-the-art devices. The IC maker gets better manufacturability and higher yield, with wafers that can contain many more devices, without disrupting current processes."

TakeCharge is being licensed to semiconductor designers and manufacturers by Sarnoff and its Belgium-based subsidiary, Sarnoff Europe. The first licensees include New Japan Radio of Kamifukuoka City, Japan; Toshiba Corporation of Tokyo, Japan; and Hynix (formerly Hyundai MicroElectronics) of Seoul, Korea.
The TakeCharge ESD design methodology and IP portfolio let designers successfully implement the technology on the first try. Only one set of silicon customization test masks and one silicon run are required, potentially saving hundreds of thousands of dollars in new masks plus valuable time for additional runs.
The technology has been proven in 0.5, 0.35, 0.25, 0.18, 0.13, 0.11, and 0.10 micron CMOS. It is being customized in 0.065 micron processes as well.
TakeCharge! is available for immediate licensing. More information is available by contacting:
Tom Lento            Steve Clemens
Sarnoff Corporation         Sarnoff Europe
TEL (609) 734-3178         +32-59-275-917
FAX (609) 734-2040         +32-59-275-916
tlento@sarnoff.com         sclemens@sarnoffeurope.com

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About Sarnoff

Sarnoff Corporation (www.sarnoff.com), a subsidiary of SRI International, creates and commercializes electronic, biomedical and information technology for clients worldwide. Founded in 1942 as RCA Laboratories, it produces innovations in such areas as integrated circuits, lasers, and imagers; computational drug discovery and drug manufacture and delivery; digital TV and video; high-performance networking; and wireless communications. Its history includes the development of color TV, the liquid-crystal display, the disposable hearing aid, and a leadership role in creating the new U.S. digital and HDTV standard. Sarnoff also founds new companies to bring its technologies to market. Twenty such companies are in various stages of development.