Cutting Corners To Make Your IC Sample Date Could Cost Your Production Ramp Plan

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Many mixed signal product development teams face the dilemma of eliminating activities to meet their target sample dates due to project schedule slippage. The result is the sample dates come back in line by shipping a design that has not been validated to meet the quality required for production. Everyone begins to feel like the project is on track until you hit characterization and the production ramp date begins to slip away due to design margin issues that are exposed too late in the product phase. You must be planning the sample strategies and trade offs up front in your design process, before you need them.

In many cases the desire to meet a sample date milestone is what drives the design team’s focus, energy and decisions. If the project is running behind schedule, the pressure on the team to recover the planned sample date increases. This will invariably lead to cases where some of the validation activities in place to produce a high quality design fall by the wayside. The first picks that usually are cut are the Design for Manufacturability (DFM) type tasks, since they are mainly validation steps. By cutting these type of tasks a small risk is added to samples and a much larger risk, although not always an obvious risk, is added to your production ramp.

Focusing the design team to do “whatever it takes” to get back on track for the project sample dates could easily extend the production schedule. Once forced into a decision of what to do about getting your sample date back on track, without benefit of prior planning of your sample strategy, the key options come down to the trimming of already planned validation activities. This leaves you open for qualification issues that might be created by eliminating specific validation steps that were put in place to guarantee a solid, high margin design. It should be apparent that the exclusion of the intended validation steps would increase the risk of another silicon spin and therefore the planned production schedule.

What can be done to prevent being forced to forgo design quality? It would not seem prudent to risk a production ramp delay in today’s market place. The choice to favor production schedule may leave you with a sample date that would lose the business. It is essential that you have developed a strategy for your sample requirements that does more than assume they just fall out of your first silicon spin. You must have a specific plan and design flow in place to cover your first samples to customers. You may wish to confer on the following items to stimulate the brainstorming of solutions for your sample strategy:

a) Enhance the management of customer spec closure and architecture work to minimize the timeline from concept to design kickoff. This essentially speeds up your design front end.

b) Partition validation into two phases. Sample validation for tapeout and then follow up with DFM validation while 1st silicon in FAB.

c) Parallel up the validation steps that take place prior to 1st silicon tapeout.

d) Alternatives to samples such as hardware emulation or modeling allowing the customer to continue their system development without the need for silicon samples.

The best times to look at the design flow is before you’re in the execution phase of a project and are faced with a possible task pruning decision. What is most important is that you do not get into a position where you are forced to eliminate DFM tasks in the interest of saving your sample plan date. That may very well cost you an entire silicon spin on your path to production ramp. This would delay your time to revenue by 10-12 weeks!

About Jorvig Consulting, Inc.

Jorvig Consulting provides services to enhance product design team processes. The key result to expect from their services is that your team will experience freedom from surprises during project execution.


Jeff Jorvig



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