IPFlex Selected for NEDO's 'Semiconductor Application Chip Project' Aiming to Bring Information Appliances to the Next Level

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Developing a processor for Internet broadcast set top boxes using consumer-oriented, next-generation dynamically reconfigurable processor technology.

IPFlex Inc. announced today that the New Energy and Industrial Technology Development Organization (NEDO), an independent administrative corporation, has selected IPFlex as a part of its dynamically reconfigurable processor Application Chip Project aiming to develop an application chip for information appliances. IPFlex’s R&D theme is a "research and development of a dynamically reconfigurable processor* for use in Internet broadcast set-top boxes".

IPFlex views NEDO’s selection as an evidence that its dynamically reconfigurable architecture is highly regarded as a mean of realizing NEDO’s goal, which is to contribute to the growth of the Japanese economy through the development of the next-generation information appliances having higher functionality, higher reliability, and lower power consumption.


With the proliferation of optical fiber networks, Internet broadcasting is expected to grow at a fast pace in the coming years. Internet broadcasting is not simple, however, with an array of copyright protection standards and video encoding methods to safely distribute the content. Currently, copyright protection standards such as DRM** and CPRM*** exist, and many different types of video encoding formats include H.264 and MPEG-2. The processor used in set-top boxes needs to support these multiple standards and formats, as well as new formats sure to emerge in the future.

IPFlex will develop a dynamically reconfigurable processor that will be capable of reconfiguring its on-chip circuit structure instantaneously to accommodate various standards and formats. With its dynamic reconfiguration technology, IPFlex chip will be a flexible hardware that will accommodate the functionalities necessitated by Internet broadcast set-top boxes.


1. Overview

(1)Project: Semiconductor Application Chip Project (Development of Application Chip Technology for Information Appliances)

(2)Name of selected theme: Research and Development of a Dynamically Reconfigurable Processor for Internet Broadcast Set-Top Boxes

(3)Research period: 2005-2006 (two years)

2. Overview of the research theme

IPFlex will perform research and development for the next-generation consumer oriented dynamically reconfigurable processor, DAPDNA-CE**** (code name: DD3-CE), for use in Internet broadcast set-top boxes. The major advantages are given below.

(1)A processor flexibly adapting to the continually developing and modified copyright protection standards and video encoding formats used in safe content distribution

(2)Performance an order of magnitude higher than the currently available devices for watching television programs on a personal computer, while consuming less than 1% of power

(3)Flexibility for content providers to update copyright protection standards and video encoding formats

These advantages will increase the set-top box’s functionality, reduce its cost, and promote farther proliferation of Internet broadcasting.

For more information about the public request for proposals and selection process, please refer to NEDO’s Web site at http://www.nedo.go.jp/informations/koubo/171205_1/171205_1.html (Japanese).


IPFlex has focused its efforts on applying the strengths of its dynamically reconfigurable architecture to providing the optimal solutions for consumer, imaging, wireless, and high-performance applications. DAPDNA-CE will be optimized for consumer applications such as information appliances. In addition to functioning as the processor for Internet broadcast set-top boxes, it will also be targeted at other appliances such as home servers, digital TV, hard disk and DVD video recorders.


With the proliferation of information communications protocols and the progress of networking, information appliances, including in-vehicle devices, are being connected into the broad network of communication devices. Processor technology plays a large role in the increase in system capability and reliability. The ability to design next generation information and communications devices is a critical issue for private corporations and governments alike. With the proliferation of broadband and increasing penetration of information appliances, supplying world-leading, next generation processors for information appliances will drive the development and adoption of such devices, and enable Japan to strengthen its international competitiveness in the semiconductor industry and information appliance market.

The purpose of this project is the development of semiconductor chip technology (including firmware) to enable next generation (higher functionality, higher reliability, lower power consumption, etc.) information appliances (including in-vehicle devices).


DAPDNA can change its hardware configuration to provide the optimal circuitry for an application on demand. This configuration change can take place not only when the system is designed, but also during operation, dynamically, in a single clock cycle*****, to meet the instantaneous change in needs of applications implemented by the system.


  • Dynamically Reconfigurable Processor: A processor capable of changing chip circuitry dynamically.

** DRM: Digital Rights Management

*** CPRM: Content Protection for Recordable Media

**** DAPDNA: Digital Application Processor, Distributed Network Architecture.

***** a single clock cycle: One clock switching operation is possible by creating configuration information beforehand and storing in the background configuration banks.


The New Energy and Industrial Technology Development Organization (NEDO) is Japan’s largest agency for the promotion of fundamental technology development. NEDO is an independent administrative corporation. NEDO provides high-level research management taking a crucial role of engaging in the leading edge technology development and aiming to sustain a nation of science and technology, as we have been in the past, in order to maintain a prosperous, energetic Japanese society within the turbulent world economy.

In order to focus the efforts of Japan’s industry, academic and government sectors and achieve success in the development of the future of Japan’s industrial, energy, and environmental technology, we create strategic plans and flexibly deal with changes in the world and the progress of research projects.


IPFlex Inc. is a fabless semiconductor company established in March 2000. IPFlex supplies high performance, multifunctional processors that are dynamically reconfigurable, and also provides development software, evaluation boards, and peripheral interface products for the processors. With its DAPDNA-2 dynamically reconfigurable processors and Software to Silicon-based DAPDNA-FW II Integrated Development Environment software, IPFlex provides solutions to shorten development cycle and to respond quickly to the changes in applications.

Editors’ note: IPFlex, DAPDNA, and Software-to-Silicon are registered trademarks of IPFlex in Japan. Other corporate and product names are the trademarks or registered trademarks of their respective owners.

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