IP Cores, Inc. Renames the High-Speed IP XEX/XTS AES Core Families

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IP Cores, Inc. announces a renaming of XEX2, XEX3 families of silicon IP cores to XTS2 and XTS3 to reflect new terminology of IEEE P1619 standard draft: a change of the encryption name from XEX to XTS. Starting from 30K ASIC gates and delivering up to 70 Gbps throughput, XTS2 and XTS3 cores provide a compact and flexible solution for an SoC designer working on a secure storage solution.

IP Cores, Inc. today announced a renaming of two families of silicon IP cores, XEX2 and XEX3 to XTS2 and XTS3 respectively, to fit the change of terminology in the draft of the IEEE P1619 disk drive encryption standard. The new drafts of P1619 standard are using a new name, XTS, for the AES encryption mode that has been previously called XEX.

"The IEEE P1619 standardization group has changed the name of the AES cipher mode from XEX-AES to XTS-AES in its new drafts to better reflect its nature as XEX-based Tweaked CodeBook mode (TCB) with CipherText Stealing (CTS). We have our first XTS cores ready within few days from the decision of SISWG to switch from the LRW mode to XEX, so we named them XEX2 and XEX3. Our XTS2 and XTS3 IP core families are just new names for the same cores renamed to avoid confusion among our customers," said Dmitri Varsanofiev, CTO of IP Cores.

High-speed Encryption Protects Data in Storage and inside the Network

Advanced Encryption Standard in the XTS mode (XTS-AES) is recently used to provide data security on a hard drive. Addressing the market demand for integrated high-speed AES crypto solution IP Cores' XTS3 family supports XTS-AES-256 and XTS-AES-128 modes as defined in the IEEE P1619 draft D11 with CTS as a standard feature. XTS2 supports 128-bit keys only for smaller gate count. Both XTS families are designed for throughput of up to 128 Mbits per MHz, and are easily parallelizable to achieve even higher data rates.

XTS2 and XTS3 configurations support AES-XTS encryption and decryption throughput up to 70 Gbps in a single core using 130 and 90 nm processes. The smallest core of the XTS2 family starts at 30K gates and delivers 7 Gbps.

Cores are available in multiple configurations to meet specific SoC throughput, power, and gate count goals. For more information about IP Cores' product line, please visit http://www.ipcores.com.

About IP Cores, Inc.

IP Cores is a fast-moving company in the field of security IP cores. Founded 2 years ago, the company provides IP cores to protect communications and intellectual property.

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DMITRI VARSANOFIEV
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