IP Cores, Inc. Announces a Family of Low-Latency AES/GCM IP Cores Supporting IEEE 802.11ad and WiGig Standards

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IP Cores, Inc. Announces a New Low-Latency Family of Silicon IP Cores Supporting the GCM-AES Mode as Defined by the NIST Publication SP800-38D and Used by Wireless Communication Standards IEEE 802.11ad and WiGig. Starting at 64K ASIC Gates and Throughput of 20 Gbps for the Low-End GCM5-32 Core, GCM5 Family of Cores Provides an Efficient Encryption Solution for an SoC Designer that Has to Work with Very Short Communication Data Packets and Multi-Gigabit per Second Data Rates.

IP Cores, Inc., setting the new benchmark for security IP cores, today announced shipments of a new scalable family of IP cores supporting the GCM-AES mode as defined by NIST publication SP800-38D. New GCM5 IP cores provide exceptionally low latency and thus enable efficient datapath design for System on Chip (SoC) vendors meeting the challenge of handling extremely short communication frames at multi-Gbps data rates implementing the new communication standards IEEE 802.11ad (Very High Throughput 60 GHz) and WiGig.

"Our existing families of the AES/GCM IP cores enabled multiple designers of high-speed networking equipment to encrypt and decrypt Ethernet data packets at line speeds of 10 Gbps, 40 Gbps , and 100 Gbps. With the arrival of the new wireless standards, we faced a requirement to handle data frames that are both shorter than the minimum Ethernet frame size and have a preamble shorter than that in the Ethernet standards ", said Dmitri Varsanofiev, CTO of IP Cores. "Our customers were able to meet this challenge by using the cores from our new GCM5 family that enabled them to handle these short frames at line-speed."

Low-Latency AES-GCM Encryption and Decryption

Advanced Encryption Standard (AES) is used in the current proposals in front of the Wireless Gigabit Alliance (WiGig) and the IEEE standard group 802.11ad. Addressing the market demand for high-speed AES crypto solutions for this market, IP Cores' GCM5 implements the AES/GCM mode. GCM5 is designed for throughput between 25.6 and 128 Mbits per MHz.

GCM5 configurations support AES/GCM encryption and decryption throughput up to 100+ Gbps in a single core using 65 nm process, with easy parallelization to reach throughputs well beyond that number. Gate count for a fully self-contained GCM5-32 starts at 64K gates.

GCM5 family contributes to the IP Cores' fast-growing portfolio of AES-based security IP cores. Cores are available in multiple configurations to meet specific SoC throughput, power, and gate count goals. For more information about IP Cores' product line, please visit http://www.ipcores.com.

About IP Cores, Inc.

IP Cores is a rapidly growing company in the field of security and DSP IP cores. Founded in 2004, the company provides IP cores for communications and storage fields, including AES-based ECB/CBC/OCB/CFB, AES-GCM and AES-XTS cores, flow-through AES/CCM cores with header parsing for IEEE 802.11 (WiFi), 802.16e (WiMAX), 802.15.3 (MBOA), 802.15.4 (Zigbee), public-key accelerators for RSA and elliptic curve cryptography (ECC), cryptographically secure pseudo-random number generators (CS PRNG), SNOW 3G and Kasumi cipher cores, lossless data compression cores as well as low-latency fixed and floating-point FFT, IFFT, and Viterbi detector cores.

WiGig is a trademark of the Wireless Gigabit Alliance. WiFi is a trademark of the Wi-Fi Alliance. Zigbee is a trademark of the Zigbee Alliance. WiMAX is a trademark of the WiMAX Forum.


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Dmitri Varsanofiev
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