Littleton, MA (PRWEB) April 12, 2010
Today, CLK Design Automation, Inc. announced Amber Path FX, the industry’s first Fast SPICE based Path Timing solution for variation analysis. Amber Path FX uses transistor level variance to deliver SPICE accurate delay and statistical timing analysis for nanometer semiconductor designs, 100,000x faster than traditional Monte Carlo SPICE simulation approaches. Amber Path FX complements PrimeTime™ and PrimeTime SI™; seamlessly extending traditional STA with Transistor Statistical Static Timing Analysis (TSSTA). Amber Path FX was developed in partnership with TSMC for use with its 40nm libraries. Free 60 day evaluations are available to qualified customers at http://www.clkda.com.
“SPICE accurate delay and variance analysis is essential at 40nm and below,” said Isadore Katz, President and CEO of CLK Design Automation. “Amber Path FX is the first practical solution in its accuracy class for timing, power, optimization and characterization.”
40nm Designs are Sacrificing Performance, Area and Power
Because of the inherent process variation in 40nm, designers are sacrificing performance, area and power. Traditional corner based static timing methods are too conservative, and existing statistical solutions are impractical and inaccurate. Monte Carlo SPICE is so slow that only a handful of potential timing violations or power savings can be evaluated.
The result is that customers are not realizing the full benefit of TSMC’s manufacturing capabilities. Estimates are that 20% or more of the performance of a 40nm design is left on the table by using corner based approaches.
Amber Path FX: a practical Fast SPICE delay and variance solution for TSMC’s 40nm PrimeTime Users
Amber Path FX operation is fundamentally “push-button,” requiring minimal set-up. With Amber Path FX, engineers can evaluate full chip designs with fast SPICE accuracy for delay and variance. Path FX was developed in conjunction with TSMC for its 40nm libraries. Analysis takes a few seconds per path, and Amber Path FX utilizes all of the processor cores available in a computer.
Amber Path FX complements PrimeTime™ and PrimeTime SI™. Amber Path FX automatically incorporates the results from a PrimeTime run, seamlessly extending traditional STA with Transistor Statistical Static Timing Analysis (TSSTA). Variance and delay results are presented in familiar report formats or SDF, and no changes are required to existing design environments or scripts.
Breakthrough TSSTA Technology: 100,000x Faster than Monte Carlo SPICE
The basis for the Amber Path FX is transistor level statistical static timing analysis (TSSTA). Amber Path FX applies a breakthrough Variance Solver to analytically determine statistical delay using TSMC’s SPICE models. While traditional Monte Carlo approaches rely on 1000’s of trials to determine statistical variance, Amber Path FX computes variance in a single pass. The Variance Solver extends Amber’s Path FX fast
SPICE engine to deliver delay and statistical analysis - TSSTA.
When combined with the Amber threaded timing platform, Path FX can evaluate all of the critical paths in a design faster than SPICE could simulate a handful of paths, or traditional STA tools perform low accuracy statistical timing on a single block.
The result is that engineers can effectively apply a trusted SPICE accurate analysis to comprehensively attack performance, area and power bottlenecks in their design.
TSMC 40nm FX models
CLKDA is working with TSMC to provide FX models for the TSMC 40nm libraries. The TSMC FX models can be used to support full statistical analysis, or local variance only within a corner.
Models for specific libraries are available upon special request from TSMC.
The FX models for a library can be characterized in a few hours using 4 copies of HSPICE or ELDO. This compares with days or weeks for CCS or ECS models. This enables TSMC and CLK to respond quickly to SPICE model or library updates.
Pricing and Availability
Amber Path FX is available now. Pricing starts at $30,000 for a one-year license. Standard discounting is based upon volume and multi-year commitments.
A free 60 day evaluation is available for qualified TSMC customers. CLK Design Automation reserves the right to decline an evaluation.
CLK Design Automation, Inc. develops and markets timing closure solutions used in the design of high-performance microprocessor and advanced semiconductors. More information can be found at http://www.clkda.com
Amber is trademark of CLK Design Automation. All other trademarks or registered trademarks are property of their respective owners.