First Silicon Success With LPDDR2 SDRAM Controller IP For High-Performance, Low-Power SoC

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Collaboration with Denali Software Achieves High-Quality Databahn LPDDR2 SDRAM Controller IP and DFI-Compliant PHY Enables 400 MHz On Advanced 45-nm Process Technology

Our low-power IP solutions and ST-Ericsson’s power-reduction technologies help designers targeting mobile applications to rapidly move from tape-out to production silicon with lower system development costs, and improve performance and reliability.

Denali Software, Inc., a leading provider of electronic design automation (EDA) software and intellectual property (IP), today announced that ST-Ericsson, a global leader in wireless semiconductors and mobile platforms, has leveraged Denali’s high-performance Databahn Low-Power Double Data Rate 2 (LPDDR2) Synchronous DRAM (SDRAM) controller IP along with STMicroelectronics’ DFI-compliant Physical IP (PHY) in its smartphone platform the U8500 on STMicroelectronics’ advanced low-power 45-nanometer (nm) CMOS manufacturing technology. The U8500 smartphone platform achieved data rates up to 800 Megabits per second per pin at 400 MHz on LPDDR2 interfaces and is an ideal solution for engineers targeting low-power mobile applications. By utilizing Denali’s design IP, ST-Ericsson was able to accelerate its LPDDR2 memory system design, lower its integration risk, and speed its time-to-market for its new innovative cell-phone chip.

According to STMicroelectronics, Denali’s configurable controller IP provides the highest level of quality required from a technology vendor. STMicroelectronics’ state-of the-art 1.2V LPDDR2 Input/Output pads (I/O) sustain 800Mbps at 8.5pF across full PVT range ensuring precision output impedance, with programmable drive to adapt various load conditions on board, compliant with all Electrostatic Discharge (ESD) standard levels.

Denali’s Databahn LPDDR2 controller IP features automatic power control for self-refresh, power-down, and dynamic frequency scaling (DFS). Additionally, the LPDDR2 controller enables the implementation of power domain retention, source-biasing, and shut-off to meet the stringent power requirements required for mobile applications.

“This recent success demonstrates our commitment to provide our customers with advanced solutions that speed time-to-market on leading-edge process technologies,” commented Mark Gogolewski, CTO of Denali Software. “Our low-power IP solutions and ST-Ericsson’s power-reduction technologies help designers targeting mobile applications to rapidly move from tape-out to production silicon with lower system development costs, and improve performance and reliability.”

About Databahn DDR SDRAM Solutions
Denali’s Databahn DDR memory high-performance solution ensures compatibility with all the latest high-speed memory technologies, including the many DDR3/2 and LPDDR2/1 devices from all major memory vendors, and supports all process technology nodes. Databahn DRAM memory controllers are DFI-compliant, highly configurable, and easy-to-integrate, enabling an opportune match for a wide range of system architectures. For more info, visit: http://www.denali.com/dram and http://www.ddr-phy.org.

About Denali Software
Denali Software, Inc., is a leading provider of electronic design automation (EDA) software and intellectual property (IP) for system-on-chip (SoC) design and verification. Denali delivers the industry’s most trusted solutions for deploying PCI Express, USB, NAND Flash and DDR DRAM subsystems. Developers use Denali’s EDA, IP and services to reduce risk and speed time-to-market for electronic system and chip design. Denali is headquartered in Sunnyvale, California and has offices around the world to serve the global electronics industry. More information about Denali, its products and services is available at http://www.denali.com.

Denali and Denali Software are registered trademarks of Denali Software, Inc. Databahn is a trademark of Denali Software, Inc. All other trademarks are of their respective owners.

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Pierre Golde
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