BEEcube is returning this year with not only new announcements, technologies, products, and applications, but with direct participation from one of our key academic researchers, and Xilinx’s University Program; both working with BEEcube technology
Fremont, CA (PRWEB) June 8, 2010
BEEcube, a leading provider of advanced system-level FPGA prototyping platforms, will exhibit at the Design Automation Conference Monday, June 14 through Wednesday, June 16th from 9:00am-6:00pm in booth #1314 at the Anaheim Convention Center in Anaheim, CA.
“We are very excited to return to DAC, after our successful premier last year,” said Joseph Rothman, Sr. VP of Marketing and Business Development., “BEEcube is returning this year with not only new announcements, technologies, products, and applications, but with direct participation from one of our key academic researchers, and Xilinx’s University Program; both working with BEEcube technology.”
BEEcube will be demonstrating a number of key FPGA verification/validation prototyping applications:
1. Mixed–Signal (Digital and RF) Prototyping Platform, highlighting digital system RF prototyping of full speed “Adaptive Frequency Modulation,” up to 3GHz using ADC and DAC modules of BEEcube’s recently announced BEE3-W™ FPGA development platform.
2. Dual-core RTL prototyping of the Sun OpenSPARC T1 multiprocessor on a BEE3™ multiple FPGA platform. The emulated SOC multiprocessor automatically loads a hypervisor upon startup and can optionally boot a full image of the Sun Open Solaris operating system.
3. A live HD video processor based prototype, highlighting BEE3’s Sting I/O™ full-speed streaming capability and on-the-fly DRAM capture. Captured data streams are downloaded via Gigabit Ethernet, and analyzed on a remote workstation using industry-standard waveform viewers for low-level, RTL signal debugging. And within the same design remote-access of dual 2GB frame buffers in native frame format, which allows live video to be delayed, paused, or manipulated in real time; Showing off BEE3’s uniquely simultaneous “full speed” RTL level and application level debug features.
4. A BEE3 based demonstration from University of California, Berkeley reflecting the findings from ACM’s Best Student Paper Award titled, “ParaLearn: A Massively Parallel, Scalable System for Learning Interaction Networks on FPGAs”. ParaLearn is a scalable, parallel FPGA-based system for learning interaction networks using Bayesian statistics.
5. BEEcube, a key member of the Xilinx University Alliance Program, will be hosting Xilinx’s latest XUP based products and demos targeting universities and educational institutions world-wide.
Details on the Design Automation Conference (DAC) can be found at: http://www2.dac.com/
BEEcube, a leading provider of advanced system-level FPGA prototyping platforms, was founded in 2006. Spinning out of the University of California, Berkeley, BEEcube’s founders include the best academic minds in Silicon Valley and are credited with founding a number of leading companies, including Atheros Communications.
There are over 150 BEE systems deployed worldwide in major corporations and top universities. Corporations currently using BEE systems include: Xilinx, Microsoft, Sun Microsystems, Aerospace Corporation, and Thales Group. Leading universities include: University of California, Berkeley, Stanford University, Massachusetts Institute of Technology, Imperial College London, Barcelona Super Computing Center, Tokyo University, Tsinghua University, and Peking University.
For more information contact info(at)beecube(dot)com or visit the website: http://www.beecube.com. Telephone: (510)252-1136. Facsimile: (888)700-8917. BEEcube’s corporate headquarters is based at 39465 Paseo Padre Parkway, Suite 3700, Fremont, CA 94538.
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