CLK Design Automation Announces High Accuracy Signal Integrity Timing Analysis

Share Article

Signal FX enables SPICE level accuracy for Path Based SI Timing Analysis - 10,000x Faster

CLK Design Automation Inc. today announced Signal FX: high accuracy signal integrity timing analysis. Signal FX provides SPICE accurate signal integrity timing analysis, 10,000 times faster than Fast SPICE or SPICE. It works with Path FX to provide a practical, accurate, high performance solution that easily integrates into existing design flows.

“Signal FX addresses the demand for SPICE accurate timing solutions in 40 nanometer and below" said Isadore Katz, President and CEO of CLK Design Automation. "Based upon the FX model, which has been qualified by TSMC in Reference Flow 11.0 as a Fast SPICE accurate solution, Signal FX is the first high accuracy SI solution that integrates path timing, statistical analysis and statistical parasitics, while delivering orders of magnitude improvement in run time.”

Signal FX adds signal integrity analysis to Path FX. Path FX complements existing STA solutions by enabling high accuracy path timing analysis. Customers run their STA tool, and the Path FX automatically delivers SPICE accurate analysis of the critical paths that have been identified. With Signal FX, customers can now analyze the crosstalk effects on those paths. Customer run their STA tool with SI, identify critical paths and their aggressors, and Signal FX uses those to deliver SPICE accurate signal integrity analysis.

At 40 nanometer and below, accuracy is critical

At 40 nanometer and below, physical implementation of high performance and low power IC designs requires high accuracy timing. Effects that could be ignored in the past such as process variance, miller capacitance, signal waveforms, can be the difference between good and bad silicon. Traditional STA tools and models lack the accuracy. SPICE and Fast SPICE lack the performance.

There are multiple points in the physical design flow where high accuracy timing is essential: modeling of IP blocks, timing closure, and yield analysis. In each of these areas, pessimistic errors of 50 or 100 picoseconds can be absolutely critical. Modeling of IP blocks, for example, creates a timing footprint that the rest of the design must conform to. The latency of the block, such as processor core, can set the performance of the entire design. Likewise, a 1 GHz clock speed translates to a 1 nanosecond clock period. Timing closure has very tight set-up and hold constraints, and the best possible estimate of the true path margin is essential. Finally, timing closure against traditional corners is no longer a guarantee of good yield. Post layout timing analysis against potential yield problems – temperature, process, and voltage – is now an important part of the sign-off process.

Accurate Signal Integrity Analysis is Essential

Signal integrity, or crosstalk, analysis is a standard part of every sign-off flow. Most STA tools use heuristics to calculate the impact of noise aggressors, and apply “conservative” metrics from when noise can occur to where it should be measured. However, with such aggressive timing margins in 40 nanometer and below, this pessimism can be excessive. For an IP block, this can mean lower clock speeds or increased power consumption. During timing closure this can mean over-buffering and excess power consumption. At yield analysis it can make 1000’s of paths appear critical, instead of 10’s of paths.

Signal FX: SPICE accurate Signal Integrity

Signal FX provides SPICE accurate signal integrity analysis to address these challenges. First, the FX model itself is typically with 2% of SPICE for timing. And because it is a transistor level model, it properly models waveform propagation, non-linear waveforms, miller capacitance, local voltage variance, etc. Second, Signal FX sweeps aggressors against the victim using same approach as would be used in SPICE or Fast SPICE. This means that the noise effect is properly calculated. Finally, Signal FX can measure noise at the receiver input (similarly to STA tools) or at the receiver output. Measuring at the output, such as would be done with SPICE, provides a much less pessimistic calculation of crosstalk.

As importantly, Signal FX is 10,000x faster than SPICE or Fast SPICE, and is very simple to use, requiring no changes to existing design flows. The performance means that 1000s of paths can be analyzed instead of 10s of paths. Using Signal FX requires none of the complexities of setting up a SPICE simulation. Designers run their existing STA/SI tool, to identify the critical paths and their aggressors. This information is easily exported into Signal FX, and then crosstalk is calculated. All of the path setup is automatically taken care of.

About CLK Design Automation

CLK Design Automation is the leader in high accuracy timing solutions - helping leading edge semiconductor companies solve their most pressing timing and manufacturing challenges at 40 and 28nm.

CLK DA’s products include AOCV FX for full library AOCV tables in days compared to weeks and months, Path FX for fast delay and variance analysis for critical paths and block timing characterization, Signal FX for SPICE accurate crosstalk analysis, and Silicon Debug to identify variation sensitive critical paths and cells.

CLK DA’s high accuracy timing technology - the FX Model, the Amber Timing Engine, and the FX Variance Solver - delivers full chip capacity, SPICE accuracy, and unprecedented performance: variance analysis 1 million times faster than Monte Carlo SPICE and path delay and crosstalk analysis 10,000 times faster than SPICE.

Amber, Path FX, AOCV FX and Signal FX are trademarks of CLK Design Automation. All other trademarks or registered trademarks are the property of their respective owners.


Share article on social media or email:

View article via:

Pdf Print

Contact Author

Ahran Dunsmoor
Visit website