San Jose, CA (PRWEB) June 29, 2011
Evgeni Stavinov’s new book “100 Power Tips for FPGA Designers” aimed at system architects, logic and hardware designers, embedded software developers, and students who want to improve their FPGA design skills. The book appeals to both novice and seasoned engineers.
“100 Power Tips for FPGA Designers” is a collection of articles on various aspects of FPGA design. Topics include: synthesis; simulation; porting ASIC designs; floorplanning and timing closure; design methodologies; performance, area, and power optimizations; RTL coding; IP core selection; and many others.
The book contains a lot of illustrations, code examples, and scripts. Rather than providing information applicable to all FPGA vendors, this book edition focuses on Xilinx Virtex-6 and Spartan-6 FPGA families. Code examples are written in Verilog HDL and available on book website.
Evgeni Stavinov is a longtime FPGA user with more than 10 years of diverse design experience. Before becoming a hardware architect at SerialTek LLC, he held different engineering positions at Xilinx, LeCroy and CATC. Evgeni holds MS and BS degrees in electrical engineering from University of Southern California and Technion - Israel Institute of Technology. Evgeni is a creator of OutputLogic.com, a portal that offers different online productivity tools.
Paperback: 474 pages
Publication date: June 17, 2011
Paperback list price: $49.95
E-book list price: only $ 19.95
Book and e-book available from Amazon, Barnes and Noble, and others.
Book website: http://outputlogic.com/100_fpga_power_tips