Montreal, Qc (PRWEB) April 10, 2013
Space Codesign Systems and Hardent are proud to announce a new training course on electronic system level (ESL) methodology and Hardware/Software Co-design for the Xilinx Zynq “All Programmable SoC” platform. This course shows how the Xilinx Zynq “All Programmable SoC” platform can be abstracted and modeled in a fully functional software representation of a hardware/software SoC design based on a mix of processors (Cortex-A9 dual MPCore and MicroBlaze), software, communication links (AXI interconnects), memories, and other IP cores.
“For many years, electronic system level (ESL) design could only be achieved in major electronics firms or at university research labs. Today, the adoption of ESL methodologies is a necessity for all in order to reach better time-to-market” said Guy Bois, founder, President and Chief Scientist of Space Codesign. “Hardent’s introduction of this technology in a formal and structured training is a unique opportunity for Xilinx Zynq developers, both new and experienced, to increase their productivity and improve the quality of their codes, while reducing their development time.”
In this class, students will receive a practical introduction of ESL design methodologies and the concept of platform-based design. The design is modeled at a high level of abstraction, called a “virtual platform”. This course provides a hands-on learning experience through labs on how the Xilinx Zynq “All Programmable SoC” platform can be abstracted and how to leverage Xilinx’s ISE™ and Vivado™ tools to achieve better results with a Zynq-based board.
The course will also use Space Codesign’s SpaceStudio™, an ESL hardware/software codesign software tool, to demonstrate how engineers can work at a higher system-level in order to better explore the design options with modern multicore architectures such as the dual-core ARM® Cortex™ A9 processor featured in the latest Xilinx® programmable platform.
“Adding ESL and Hardware Software Codesign is a natural progression to our training class offerings,” said Simon Robin, founder and president at Hardent, Inc. “Since last summer, Hardent has been training engineers on the Xilinx ‘All Programmable SoC’ and its tools. Space Codesign’s technology complements the Xilinx design tools with a higher level of abstraction. By working at a higher system-level with ESL and by performing hardware/software codesign, Zynq developers will better leverage Xilinx tools to improve the ROI of the board.”
The students in this course will receive the most authoritative material in the field, such as found in the book “ESL Design and Verification: A Prescription for Electronic System Level Methodology (Systems on Silicon)” written by Grant Martin, Brian Bailey and Andrew Pizali. For further information about this new training, please read the course syllabus on Hardent’s site or check the PDF file attached to this press release.
Hardent is a professional services firm providing engineering, training and management consulting to leading worldwide electronics equipment and component manufacturers. Hardent’s experts cultivate innovation in electronics, especially with ASICs, FPGAs, DSPs, embedded software and system design. Hardent consultants are trusted advisers in developing high-complexity products, improving engineering processes, enhancing the team's skills and accelerating products’ time-to-market.
About Space Codesign Systems
Space Codesign® Systems, Inc. is the developer of SpaceStudio™, the only ESL (Electronic System Level) design technology that enables end-to-end automated hardware/software codesign - from high-level functional specification to the architectural and RTL (Registered Transfer Level) coding phase. This automation enables electronics engineers to enjoy a higher level of abstraction and executable representation for embedded systems design in industries such as aerospace and commercial multimedia applications. SpaceStudio is distributed worldwide. On the US west coast, EDATechForce handles Space Codesign’s sales.