San Jose, CA (PRWEB) January 30, 2014
Arasan Chip Systems, Inc. (“Arasan”), a leading provider of Total IP Solutions for mobile applications, announced today the availability of a MIPI D-PHY module for prototype development. The D-PHY prototype module enables development, validation, testing and launching products with MIPI camera (CSI-2) and display (DSI) interfaces, in the shortest possible time frame.
Arasan’s D-PHY Prototype Module supports High Speed (80Mbps to 1.5Gbps per lane), as well as Low Power (at 10Mbps). Four (4) data lanes were implemented, and the module was tested with CSI-2 (Tx & Rx) as well as DSI (Tx & Rx).
Arasan is the market leader in analog and digital IP for MIPI interface products. “SoC and Application Processor developers rely on FPGA prototypes for validating and debugging new designs, but the operating voltages and frequencies required by D-PHY are not supported by standard FPGA I/O’s. Arasan’s D-PHY module provides a solution in the form of a daughter card,” said Zachi Friedman, Arasan Director of Product Marketing.
The D-PHY Module is available now. It ships with technical documentation, and (8) SMA cables. For more information: Visit Arasan.com/phy.
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, Hardware Validation Platforms, software stacks & drivers, and optional customization services for MIPI, USB, SD, SDIO, eMMC, and UFS standard based IPs. That is unlike most other IP providers, who only have some of the components for a total IP solution, but not all.
Arasan’s Total IP products serve system architects and chip design teams in mobile, industrial, gaming and desktop computing systems, that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk. Arasan Chip Systems is based in San Jose California, and has an 18 year track record of leadership in IP development.