Excellicon's Automated CDC Setup Improves Noise in CDC Analysis and Provides Significant Productivity Gains

Share Article

Excellicon can provide a significant productivity advantage and ease of analysis by automating the set up process for CDC analysis for ASIC chip designers, and providing feedback from CDC analysis to timing constraints files.

Excellicon Inc. an innovative provider of end-to-end timing constraints products announced release of automated CDC (Clock Domain Crossing) Environment setup suite and CDC report analyzers to enhance and extend performance of any existing functional CDC tools. The users of Excellicon products can now very simply and automatically generate necessary seed setup environment files necessary for running their existing CDC tools based on advanced formal analysis. Excellicon generated CDC setup environment provides necessary files for any layer of hierarchy and for any mode of the design, enabling faster and accurate setup process. As a result of proper setup the resulting CDC reports will be more accurate and contain much less noise. In addition the user now has the option to close the loop between functional and timing domains and back annotate CDC results into timing constraints for noise-less analysis.

“Performing CDC analysis today is a very time consuming, taking weeks of designers time. The manual setup process is usually error prone and done for one mode; functional mode, and a given level of hierarchy chosen to minimize analysis effort. Despite such time consuming effort the setup environment is often incomplete, while the choice of hierarchy is generally dictated by tool capacity, leading to noisy reports and frustrated designers. Clock Domain Crossing products in the market place are fully dependent on user feedback and knowledge of spec as well as any available design information, which are then manually translated into a setup environment file for a single mode and for a given layer of hierarchy. As a result a comprehensive and full multi-mode hierarchical CDC analysis is often not a viable option due to high cost of setup for any design team.” said Rick Eram, VP of sales and marketing at Excellicon.

He also added “Available CDC products are generally noisy and provide either a noise reduction scheme through tedious and manual setup process or later through elaborate and multi layer filtering/waiving of unwanted messages without proper propagation of such filtering to next layer of hierarchy. All the effort is to compensate for incomplete setup and lack of propagation of accurate setup information through out the design layers. Excellicon can eliminate much of guess work form the process while offering accuracy of automation in seconds.“

It is also important to note that Excellicon’s approach depends on actual design as opposed to legacy timing constraints. Use of legacy timing constraints files as a seed input for CDC setup where there’s often issues left from older versions of the timing constraints leads to inaccurate setup, and added noise. Also complicating matters is lack of availability of the timing constraint files, which are traditionally developed by implementation engineers and therefore invariably not available when the RTL is being coded and analyzed for CDC issues.

Through this offering Excellicon provides significant productivity gain by automation of CDC setup process and providing capability to back annotation CDC results into timing constraints files. User can now minimize manual duplication of CDC setup effort while enabled to perform in-depth hierarchical analysis with much less noise. Empowering designer to choose hierarchy level allows designer to improve CDC tool performance and manage the capacity related issues with ease.

About Excellicon
Excellicon is an innovative provider of end-to-end Timing Constraints Analysis and Debugging solutions for the automation of constraints authoring, completion, and validation from RTL to GDS with innovative analysis and debugging infrastructures. Excellicon products CONstraints MANager, CONstraints CERTifier, and CONSTAr address the needs of designers at every stage of SOC design and implementation in a unified environment. – Timing Closure; Done Once! Done Right!

Share article on social media or email:

View article via:

Pdf Print

Contact Author

Fia Johansson
Visit website