Arasan Chip Systems Announces Availability of MIPI® M-PHY 3.0 Gear 3 IP in UMC40LP
San Jose, California (PRWEB) June 26, 2014 -- M-PHY 3.0 Gear 3 on UMC40LP joins the list of process node options, available from Arasan for customers designing UFS 2.0. The PHY has achieved 5.85Gbps performance, with BER smaller than 1E-10.
Watch a video of the M-PHY Gear 3B Demonstration using the Agilent JBERT N4903, Agilent Infinium oscilloscope DSA91304A, and Bitifeye M-PHY frame generator.
“Once again, we utilized our in-house expertise in porting analog PHYs from one process node to another, in order to add the much requested UMC40LP to our portfolio” commented Zachi Friedman, Sr. Director of Marketing. “Our top-notch engineers, and our work flow for PHY ports, have once again proven very effective - we call it The Arasan Porting Engine,“ he added.
In 2014 Arasan began its 10th year as a contributing member in MIPI. Arasan has participated in numerous working groups including Camera, DigRF, Display, High Speed Synchronous Interface, Low Speed Mutlipoint Link, Low Latency Interface, PHY, RF Front End, and UniPro. Arasan’s technical staff contributed to the electrical specification of MPHY v2 and v3. The company is actively supporting the use of MIPI UniPro and M-PHY in the storage (JEDEC UFS) ecosystem, working closely with UFSA and contributing companies for verification and compliance testing.
Availability
More information and datasheets for Arasan’s portfolio of Total IP Solutions for MIPI standards can be found at Arasan.com/MIPI.
About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile storage and connectivity applications. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for MIPI, USB, UFS, SD, SDIO, MMC/eMMC, UFS, and many other popular standards. Arasan’s Total IP products serve system architects and chip design teams in mobile, gaming and desktop computing systems that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.
Unlike many other IP providers, Arasan’s Total IP Solution encompasses all aspects of IP development and integration, including analog and digital cores, hardware development kits, protocol analyzers, validation IP and software stacks and drivers and optional architecture consulting and customization services. Based in San Jose, CA, USA, Arasan Chip Systems has a 17 year track record of IP and IP standards development leadership.
About MIPI Alliance
MIPI® Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. Founded in 2003, the organization has more than 250 member companies worldwide, more than a dozen active working groups, and has delivered more than 45 specifications within the mobile ecosystem in the last decade. Members of the organization include handset manufacturers, device OEMs, software providers, semiconductor companies, application processor developers, IP tool providers, test and test equipment companies, as well as camera, tablet and laptop manufacturers. For more information, please visit http://www.mipi.org.
MIPI®, M-PHY®, and UniPro(SM) are trademarks, servicemarks, registered trademarks, and/or registered servicemarks owned by MIPI Alliance. All other trademarks, servicemarks, registered trademarks, and registered servicemarks are the property of their respective owners.
Sam Beal, Arasan Chip Systems, Inc., http://arasan.com, 408-282-1600, [email protected]
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