Intel FSP Accelerates Adoption of Open Source x86 Embedded Development

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Sage Electronic Engineering presents basics of open source firmware implementation with Intel® FSP at RTECC Santa Clara Jan. 22

With smaller and lower-power Intel® processors in the mix for embedded development this year, Sage Electronic Engineering, http://www.se-eng.com, expects the Intel® Firmware Support Package (Inte® FSP) to shoulder an even greater role.

“The Intel FSP lies at the core of successful early adoption of open source processor initialization and bootloading with Intel’s protected architecture, and this method is now gaining more widespread acceptance,” said Drew Jensen, vice president of Global Business Development at Sage. “When Intel first began thinking about this idea, open source embedded development was years behind the processor introduction; today we at Sage believe that open source implementation will parallel BIOS and UEFI implementation.”

At the Jan. 22 RTECC Santa Clara, CA, Jensen, who in 2012 was the original Product Marketing Manager for Intel FSP, will introduce the basics of working with the Intel FSP binary and coreboot® implementation in: “The Future of Firmware is Open,” from 3 to 3:45 p.m. in Classroom 207 of the Santa Clara Convention Center, 5001 Great America Pkwy. Intel Senior Firmware Engineer Maurice Ma, will also address the Intel FSP in his talk: Intel® Firmware Support Package (Intel FSP) – A Rapid, Competitive, and Scalable Firmware Solution for IoT and Embedded Systems,” from 11:00 a.m. to 12:30 p.m. in Classrooms 203 and 204.

SageBIOS Board Support Packages, which employ coreboot and the Intel FSP, have yielded tremendous improvements over legacy BIOS systems, including a 707-millisecond initialization in advance of a Linux or Windows operating system on an Intel Atom™ processor E3800 (formerly known as Bay Trail). SageBIOS BSP solutions employing the Intel FSP also include processor families formerly known as Rangeley, Ivy Bridge, Bay Trail and Haswell.

Sage is participating in the review of the Intel FSP architecture for 5th Generation Intel Core processors (formerly known as Broadwell) designed for embedded development. Sage also modifies the source code in the Intel FSP for custom solutions, which can yield even greater reductions in the total lines of code, boot speed and advanced features.

The Intel FSP binary yields a standardized API allowing Intel silicon to be initialized using any customized system firmware implementation from open source. This has enabled Sage to develop SageBIOS as the foundation for run time operating systems including Linux, Google Android, Google Chrome, Microsoft Windows, RTOSs, Hypervisors and other proprietary operating environments. In addition, SageBIOS will boot to both 32-bit and 64-bit operating systems with a single boot image, as well as boot legacy operating systems such as BSD, older Microsoft Windows versions and even DOS. Sage will be demonstrating this capability at the Santa Clara RTECC show using SageBIOS on the new MinnowBoard MAX open source hardware design.

"Open source hardware and software is an important component of Intel's IoT strategy," said Mike Carboni, Director of Software Engineering for Intel's Internet of Things Group.

"Open hardware products such as Minnowboard, Minnowboard MAX, Intel Galileo, and Intel Edison are creating tremendous opportunity for innovation in the IoT space,” Carboni said. “Along with the well-known UEFI compliant FW API, the Intel FSP also gives the community flexibility in creating open source firmware implementations for Intel CPUs, such as solutions based on the coreboot open source project."

Jensen said Intel’s efforts in developing the Intel FSP will begin to pay great dividends this year in broadening Intel’s market share in the Internet of Things space.

“The explosion of the type of IoT devices that will be developed, as well as the variety of solutions for the back-end datacenter, will necessitate open source development to be able to scale the development,” Jensen said. “The Intel FSP is pivotal to enabling the engineering scale out for billions of IoT devices and the associated infrastructure based on Intel CPUs.”

“Intel FSP releases have already radically cut the lag time between silicon introduction and embedded development from years to months, helping to support open source development of all flavors,” he added. “Offering optimized Intel FSP code as early as possible in the microprocessor rollout is important to all developers seeking streamlined firmware solutions, as speed, security and hardware reduction become increasingly important across the spectrum of computing.”

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About Sage Electronic Engineering
Sage Electronic Engineering, LLC, of Longmont, Colo. (http://www.se-eng.com), is an Affiliate member of the Intel® Internet of Things Alliance, providing royalty-free customized Board Support Packages marrying open source (including coreboot®) solutions with proprietary software. Sage partners with processor manufacturers, including Intel®, to provide coreboot solutions for the open source community, as well as developing SageBIOS™ BSPs for customers desiring the flexibility of open source firmware stripped of unnecessary code and backed by rigorously tested solutions.

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