Arasan Announces MIPI DPHY IP Core for TSMC 40uLP Process Targeting IoT

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Arasan Chip Systems, a leading provider of semiconductor IP for mobile and automobile SoCs today announced the availability of its MIPI DPHY IP Core for TSMC’s latest TSMC 40uLP process supporting 0.9v & 1.1v.

MIPI.org

Arasan introduced the industry's first CSI, DSI, and DPHY IP in 2005. We continue to expand the industry's largest DPHY IP Portfolio with this announcement for TSMC 40uLP, Sam Beal, Director of Marketing.

Arasan today announced the immediate availability of its MIPI D-PHY IP Core which is fully compliant to the D-PHY specification version 1.1 for the TSMC 40uLP process. It supports the MIPI® Camera Serial Interface (CSI-2) and Display Serial Interface (DSI) protocols. It is a Universal PHY that can be configured as a transmitter, receiver or both. This IP core is specially optimized for area and power, utilizing the lower power supply options of the new uLP process from TSMC on 40nm technology.

TSMC's ultra-low power processes can further lower the operating voltages thereby lowering both active power and standby power consumption as well as providing significant increase in battery life. The process also enables the integration of radios and FLASH delivering a significant performance and efficiency gain for next-generation intelligent products.

“Arasan has been a contributing member of the MIPI Association since 2005 with their introduction of the industry's first CSI, DSI, and DPHY IPs. We continue to expand the industry's largest DPHY IP Portfolio with this announcement for TSMC 40uLP ” said Sam Beal, Marketing Director at Arasan.

Out of the total semiconductor growth of $126 billion forecast between 2014 and 2019, $33 billion, or 34%, is expected to be generated by IoT related semiconductors according to PwC.

Availability
Arasan’s D-PHY IP Solution is available now and includes a full PPI digital interface in RTL with the analog GDSII database with deliverables for layout integration. The D-PHY has been ported to over one dozen process nodes. Arasan plans to announce support for USB 2.0 PHY IP Core in 40uLP process later this quarter.

About Arasan
Arasan Chip Systems is a leading provider of Total IP Solutions for mobile and the next generation of Smart applications from home to automobile. Arasan’s high-quality, silicon-proven, Total IP Solutions include digital IP cores, analog PHY interfaces, verification IP, hardware verification kits, protocol analyzers, software stacks and drivers, and optional customization services for Ethernet, MIPI, PCIe, USB, UFS, SD, SDIO, eMMC, and UFS. Arasan’s Total IP products serve system architects and chip design teams in applications that require silicon-proven, validated IP, delivered with the ability to integrate and verify both digital, analog and software components in the shortest possible time with the lowest risk.

About TSMC
TSMC manufactures products for various applications covering a variety of computer, communications and consumer electronics market segments.

About the MIPI Alliance
MIPI Alliance (MIPI) develops interface specifications for mobile and mobile-influenced industries. Founded in 2003, the organization has more than 275 member companies worldwide, more than 15 active working groups, and has delivered more than 45 specifications within the mobile ecosystem in the last decade. Members of the organization include handset manufacturers, device OEMs, software providers, semiconductor companies, application processor developers, IP providers, test and test equipment companies, as well as camera, tablet and laptop manufacturers. For more information, please visit http://www.mipi.org.

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