CAMPBELL, Calif. (PRWEB) October 19, 2017
ArterisIP, the innovative supplier of silicon-proven commercial system-on-chip (SoC) interconnect IP, today announced that it has acquired exclusive rights to iNoCs’ software, hardware, and associated intellectual property. iNoCs was founded in 2007 by leading researchers in the field of network-on-chip (NoC), Giovanni De Micheli, Luca Benini, Federico Angiolini and Srinivasan Murali, to pioneer the field of topology synthesis for the then emerging NoC interconnect IP market. Antonio Pullini later joined them to bring topology placement expertise. iNoCs has developed exciting concepts, algorithms, and software that address the increasing complexity of deep submicron semiconductor interconnects. With this agreement, ArterisIP will accelerate the adoption of these innovative technologies by implementing them in its extensive product roadmap and making them available to its broad customer base.
“iNoCs has developed exciting capabilities in network-on-chip automation and topology synthesis. These capabilities are complementary to ArterisIP cache coherent and main interconnect technologies that have been deployed in over 250 SoCs,” said K. Charles Janac, President and CEO of ArterisIP. “We are delighted to be able to leverage the exciting developments pioneered by iNoCs and to be associated with some of the leading researchers in the field of network-on-chip technology.”
“ArterisIP is the commercial leader in network-on-chip interconnect technology so it was natural for us to place the iNoCs software and technology with them,” said Giovanni De Micheli, iNoCs co-founder and Professor and Director of the Institute of Electrical Engineering at EPFL, Lausanne, Switzerland. “With our involvement, ArterisIP will be able to leverage the work done by the iNoCs team in their future generation products, and build upon this technology foundation.”
The ArterisIP/iNoCs transaction closed on October 18, 2017. The financial terms were not disclosed.
ArterisIP provides system-on-chip (SoC) interconnect IP to accelerate SoC semiconductor assembly for a wide range of applications from automobiles to mobile phones, IoT, cameras, SSD controllers and servers for customers such as Samsung, Huawei / HiSilicon, Mobileye (Intel), Altera (Intel), and NXP Semiconductors. ArterisIP products include the Ncore cache coherent and FlexNoC non-coherent interconnect IP, as well as optional Resilience Package (functional safety) and PIANO automated timing closure capabilities. ArterisIP is an active contributor to the United States Technical Advisory Group to ISO TC22/SG3/WG16, which develops the ISO 26262 automotive functional safety standard. Customer results obtained by using ArterisIP products include lower power, higher performance, more efficient design reuse and faster SoC development, leading to lower development and production costs. For more information, visit http://www.arteris.com or find us on LinkedIn at http://www.linkedin.com/company/arteris.
Arteris, ArterisIP, FlexNoC. Ncore, PIANO, and the ArterisIP logo are trademarks of Arteris, Inc. All other product or service names are the property of their respective owners.