Blue Pearl Software Announces Release 8.1 with Advanced Clock Analysis

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Demos at DAC, June 2-4, 2014, Moscone Center, San Francisco, California

Blue Pearl Software, Inc., the provider of EDA software that accelerates IP and FPGA verification, announces release 8.1 of its software suite for Windows® and Linux® operating systems. It introduces Advanced Clock Analysis that allows designers to visually verify and get guidance on their clock domain crossings (CDC) automatically.

“Blue Pearl Software is focused on providing automation for design analysis, CDC checking and timing constraints generation,” said Ellis Smith, Chairman and CEO, Blue Pearl Software. “By adding Advanced Clock Analysis, we are providing a level of automation for clock domain crossings setup and checking that does not exist with other tools.”

Blue Pearl’s Advanced Clock Analysis provides a graphical representation of the clock domains and gives users guidance for proper synchronization. The Visual Verification Environment™ includes time saving debug features such as graphical representation of FSMs, CDC and false path viewers with cross probing to RTL, schematic representation of RTL with forward and reverse tracing, and linting message filtering. Designers can easily verify if clock interactions are correct before running CDC analysis.

Additional Release 8.1 features include a tool setup wizard, cross probing from log file to schematic, enhanced clock domain determination, multi-cycle path viewer, migration of waivers, enhanced Tcl support for SDC constraints, and false path and multi-cycle path minimization.

At DAC, Blue Pearl Software will also show its patented User Grey Cell™ technology that fills holes in current design flows.

To Learn More
Release 8.1 of the Blue Pearl Software Suite will be demonstrated at the Design Automation Conference (DAC), June 2-4, in Booth #832, Moscone Center, San Francisco, California.

To reserve a private demo at DAC, please register here.

Price and Availability
Release 8.1 of the Blue Pearl Software Suite is available now. The base product, RTL analysis, starts at $10K for a floating 1-YR TBL, with the other options CDC and SDC priced at $10K, and $15K respectively. Please contact sales(at)bluepearlsoftware(dot)com to arrange a demo, or for additional pricing and upgrade information.

The Blue Pearl Software Suite is also available for online purchase via the Embedded Software Store or the Blue Pearl Software online store. For more information about the online stores, please visit or

For more information about Blue Pearl Software, please visit

About Blue Pearl Software
Blue Pearl Software provides EDA software that accelerates IP and FPGA design verification. The company’s Blue Pearl Software Suite checks RTL designs for functional errors and automatically generates comprehensive and accurate Synopsys Design Constraints (SDC) to improve quality of results (QoR) and reduce FPGA design risks.

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Shakeel Jeeawoody