FRAMINGHAM, Mass. (PRWEB) February 21, 2019
Bluespec is pleased to announce it will be co-hosting the Boston RISC-V Technical Symposium, an opportunity to engage with the RISC-V community that is revolutionizing processor innovation through open source collaboration. The event, occurring February 28 in Boston, is a great opportunity for attendees to explore the global phenomenon of RISC-V and the countless creative solutions it is spurring. It is one of the 50+ trailblazing RISC-V symposiums being held around the globe this year, seeking to advance a stronger education for RISC-V ISA. Bluespec will be presenting the symposium in partnership with SiFive, the company founded by the inventors of the RISC-V architecture.
Bluespec’s CTO, Rishiyur Nikhil, will be giving the keynote presentation on RISC-V verification and design using Bluespec’s cutting-edge tools. As ISA Formal Spec Task Group Chair for the RISC-V Foundation, Nikhil will be presenting the RISC-V History and the State of the Union address. Bluespec will be at the center of this exciting event, which includes keynote presentations and demonstrations from industry leaders and academics.
Attendees will learn about RISC-V core development boards, high-bandwidth memory IP subsystem-validation boards, and RISC-V SoC platforms, which will be showcased throughout the day. The event also provides an opportunity for guests to connect with engineers, architects, developers, and executives from top companies within the RISC-V community.
The event will kick off at 8:00 am at the Boston Burlington Marriott located at 1 Burlington Mall Road in Burlington, MA. Attendance is free and lunch will be included.
About: Bluespec, Inc. provides hardware development tools that reduce the time, effort and risk of developing RISC-V processors and systems. It is a founding member of the RISC-V Foundation and a leader in the RISC-V open-source movement that is paving the way for a new wave of open innovation in processor-based systems.