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IP Cores, Inc. ships new PQC1 hardware accelerator for post-quantum cryptography


News provided by

IP Cores Inc.

Jun 03, 2025, 03:00 ET

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IP Cores, Inc. (http://www.ipcores.com) announces shipments of the newly released PQC1 Post-Quantum Cryptography Accelerator Core that supports both ML-KEM (FIPS-203) and ML-DSA (FIPS-204).

PALO ALTO, Calif., June 3, 2025 /PRNewswire-PRWeb/ -- IP Cores, Inc., California, USA (http://www.ipcores.com ) has announced shipments of the PQC1 core that combines support for popular post-quantum cryptography standards, being designed to accelerate the key exchange and digital signature operations. The details are available at https://www.ipcores.com/PCQ1_info.html

"The PQC1 core is targeting embedded implementations that need to support both ML-DSA and ML-KEM algorithms in a compact package (about 100K gates) at high speed." said Dmitri Varsanofiev, CTO of IP Cores, Inc "The core includes a Keccak accelerator that can also be used on its own to support a variety of SHA-3 and SHAKE algorithms per FIPS-202"

"The PQC1 core is targeting embedded implementations that need to support both ML-DSA and ML-KEM algorithms in a compact package (about 100K gates) at high speed." said Dmitri Varsanofiev, CTO of IP Cores, Inc

Post this

PQC1

The PQC1 core provides acceleration of cryptography operations per the ML-KEM (FIPS-203) and ML-DSA (FIPS-204) post-quantum cryptography digital signature standards. The design requires only minimal CPU intervention thanks to the internal microprogramming sequencer that also provides flexibility to support evolving standards.

Post-Quantum Cryptography

Post-Quantum Cryptography or PQC refers to cryptographic algorithms, used to secure communications against attacks from both current-day computers and the anticipated quantum computers (https://www.nist.gov/cybersecurity/what-post-quantum-cryptography). Current encryption methods (like RSA and ECC) are vulnerable to being broken by the future quantum computers (https://en.wikipedia.org/wiki/Quantum_computing).

PQC aims to replace these with new algorithms that rely on different mathematical problems believed to be difficult for even quantum computers to solve (https://en.wikipedia.org/wiki/Post-quantum_cryptography).

FIPS-203

FIPS 203, or Module-Lattice-based Key-Encapsulation Mechanism, is a standardized algorithm for key encapsulation mechanisms (KEMs) with the intention of being resistant to attacks from future quantum computers (https://csrc.nist.gov/pubs/fips/203/final). FIPS-203 provides a secured method for establishing shared secret keys (for encryption and decryption) between two parties over insecure channels. FIPS-203 is part of the PQC standards developed by NIST (U.S. National Institute of Standards and Technology) in anticipation of future quantum computers decryption capabilities.

FIPS-204

FIPS-204, or Module-Lattice-Based Digital Signature Standard, is a Federal Information Processing Standard with the goal to specify a cryptographic algorithm for generating and verifying digital signatures to ensure security from conventional and anticipated quantum computers. (https://csrc.nist.gov/pubs/fips/204/final)

About IP Cores, Inc.

IP Cores (http://www.ipcores.com) is a long-established California company in the field of security, error correction, data compression, and DSP IP cores. Founded in 2004, the company provides hardware IP cores for embedded, communications and storage fields, including AES-based ECB/CBC/OCB/CFB, AES-

GCM and AES-XTS cores, MACsec 802.1AE, IPsec and SSL/TLS protocol processors, flow-through AES/CCM cores with header parsing for IEEE 802.11 (WiFi), 802.16e (WiMAX), 802.15.3 (MBOA), 802.15.4 (Zigbee), public-key accelerators for RSA and elliptic curve cryptography (ECC), true random number generators (TRNG), cryptographically secure pseudo-random number generators (CS PRNG), secure SHA and MD5 cryptographic hashes, lossless data compression cores, low-latency and low-power fixed and floating-point FFT and IFFT cores, as well as cyclic, Reed-Solomon, LDPC, BCH and Viterbi forward error correction (FEC) decoder cores.

All mentioned trademarks and registered trademarks are the property of their respective owners.

Media Contact

Dmitri Varsanofiev, IP Cores Inc., 1 6508157996, [email protected], ipcores.com

SOURCE IP Cores Inc.

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