﻿<?xml version="1.0" encoding="utf-8"?><?xml-stylesheet type="text/xsl" href="/prwebFeeds.xsl"?><rss version="2.0"><channel><title>PRWeb.com Press Release Feed - PRWeb Press Release Account Feed</title><link>http://www.prweb.com</link><description>PRWeb.com Press Release Feed - Press Releases</description><language>en</language><managingEditor>xml@emediawire.com</managingEditor><webMaster>xml@emediawire.com</webMaster><lastBuildDate>Tue, 31 May 2011 03:00:13 GMT</lastBuildDate><ttl>30</ttl><item><title>Helic’s EDA Tools Greatly Contributed to Successful Development of SHARP’s RF-IC</title><link>http://www.prweb.com/releases/2011/5/prweb8499334.htm</link><pubDate>Tue, 31 May 2011 07:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design and SHARP CORP., proudly announce that SHARP selected Helic’s VeloceRF™, VeloceRaptor/X™ and VeloceWired&#174; to be part of their RFIC design flow.</p><p>(PRWeb May 31, 2011)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2011/5/prweb8499334.htm">http://www.prweb.com/releases/2011/5/prweb8499334.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2011/5/prweb8499334.htm</guid></item><item><title>NetLogic Microsystems Selects Helic’s Tools for RF IC Design Flow</title><link>http://www.prweb.com/releases/2011/5/prweb8442773.htm</link><pubDate>Thu, 19 May 2011 07:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic, Inc., the technology leader in EDA solutions for RF and high-speed IC design proudly announces that NetLogic Microsystems selected Helic’s VeloceRF™ and VeloceRaptor/X™ to be part of their RFIC design flow.</p><p>(PRWeb May 19, 2011)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2011/5/prweb8442773.htm">http://www.prweb.com/releases/2011/5/prweb8442773.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2011/5/prweb8442773.htm</guid></item><item><title>Helic and TSMC Collaborate on 65nm RF Reference Design Kit 2.0 </title><link>http://www.prweb.com/releases/2010/08/prweb4111564.htm</link><pubDate>Tue, 10 Aug 2010 07:01:00 GMT</pubDate><description> <![CDATA[  <p>Helic’s VeloceRF validated by TSMCfor inductor synthesis and extraction in RF RDK 2.0</p><p>(PRWeb August 10, 2010)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2010/08/prweb4111564.htm">http://www.prweb.com/releases/2010/08/prweb4111564.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2010/08/prweb4111564.htm</guid></item><item><title>Visit Helic at DAC Booth #1450 and TSMC Open Innovation Forum Booth #294 </title><link>http://www.prweb.com/releases/2010/06/prweb4093274.htm</link><pubDate>Mon, 07 Jun 2010 07:01:00 GMT</pubDate><description> <![CDATA[  <p>Helic, Inc., the technology leader in inductor synthesis and extraction solutions for Analog/RF and high-speed IC design welcomes you to visit our booth at DAC and attend live demos of Helic’s latest product releases. </p><p>(PRWeb June 07, 2010)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2010/06/prweb4093274.htm">http://www.prweb.com/releases/2010/06/prweb4093274.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2010/06/prweb4093274.htm</guid></item><item><title>Helic Launches Designers’ Forum </title><link>http://www.prweb.com/releases/2010/05/prweb4010184.htm</link><pubDate>Wed, 19 May 2010 07:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic takes the initiative to bring closer the Design and the EDA communities in an effort to better shape the tools of tomorrow</p><p>(PRWeb May 19, 2010)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2010/05/prweb4010184.htm">http://www.prweb.com/releases/2010/05/prweb4010184.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2010/05/prweb4010184.htm</guid></item><item><title>Helic Launches VeloceWired for Bondwire Design in the IC Flow</title><link>http://www.prweb.com/releases/2008/06/prweb990504.htm</link><pubDate>Mon, 09 Jun 2008 07:01:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. announces today the commercial release of VeloceWired, a powerful IC package tool that accelerates bondwire design and simulation and enables optimization of high-speed lead-frame packages and co-design with analog and mixed-signal ICs.</p><p>(PRWeb June 09, 2008)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2008/06/prweb990504.htm">http://www.prweb.com/releases/2008/06/prweb990504.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2008/06/prweb990504.htm</guid></item><item><title>ClariPhy Leverages Helic&#39;s VeloceRF™ EDA Tool For First-Pass Success of CMOS 10G Mixed-Signal IC</title><link>http://www.prweb.com/releases/2007/06/prweb530104.htm</link><pubDate>Mon, 04 Jun 2007 07:01:00 GMT</pubDate><description> <![CDATA[  <p>ClariPhy Communications and Helic S.A. today announced details of their joint engineering collaboration over the past 12 months, which has been instrumental in the first-pass success of ClariPhy&#39;s single-chip, 10GBASE-LRM, mixed-signal CMOS transceiver.</p><p>(PRWeb June 04, 2007)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2007/06/prweb530104.htm">http://www.prweb.com/releases/2007/06/prweb530104.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2007/06/prweb530104.htm</guid></item><item><title>Helic&#39;s VeloceRF™ is Selected by Fujitsu to Build RFIC Design-flow for Sub-100nm CMOS Processes</title><link>http://www.prweb.com/releases/2007/06/prweb528496.htm</link><pubDate>Mon, 04 Jun 2007 07:01:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. proudly announces that Fujitsu Limited has adopted VeloceRF™ and Helic&#39;s technology to build a new design-flow for RFICs in its 90nm and 65nm CMOS processes. The parties have agreed to develop world-class tooling and design methodology to support rapid prototyping and volume production of high-frequency ICs applying advanced lithography techniques.</p><p>(PRWeb June 04, 2007)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2007/06/prweb528496.htm">http://www.prweb.com/releases/2007/06/prweb528496.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2007/06/prweb528496.htm</guid></item><item><title>New Release of VeloceRF™ Supports 90-nm &amp; 65-nm RFIC Design</title><link>http://www.prweb.com/releases/2006/07/prweb408845.htm</link><pubDate>Thu, 20 Jul 2006 12:00:00 GMT</pubDate><description> <![CDATA[  <p>An enhanced inductance modeling engine, synthesis and verification capabilities for nanometer-scale RF CMOS are among the new features of VeloceRF™ version 1.5.</p><p>(PRWeb July 20, 2006)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2006/07/prweb408845.htm">http://www.prweb.com/releases/2006/07/prweb408845.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2006/07/prweb408845.htm</guid></item><item><title>Micro Linear Selects Helic&#194;s VeloceRF for RFIC Inductor Synthesis Modeling and Verification</title><link>http://www.prweb.com/releases/2005/06/prweb249196.htm</link><pubDate>Fri, 10 Jun 2005 12:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. proudly announces that another semiconductor company has selected its VeloceRF EDA product. Micro Linear Corporation (Nasdaq: MLIN), a leading digital wireless transceiver U.S. company, will be using VeloceRF for synthesis, modeling and verification of integrated inductors in its RFIC designs.</p><p>(PRWeb June 10, 2005)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2005/06/prweb249196.htm">http://www.prweb.com/releases/2005/06/prweb249196.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2005/06/prweb249196.htm</guid></item><item><title>Helic Introduces Unique New Features in the VeloceRF&#194; Toolset</title><link>http://www.prweb.com/releases/2004/12/prweb188419.htm</link><pubDate>Wed, 15 Dec 2004 13:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. announces today the commercial availability of VeloceRF&#194; v1.4.2 featuring an enhanced Spiral Wizard&#194;. The Spiral Wizard module within VeloceRF can rapidly and efficiently deliver spirals &#194;to-order&#194;, tailored exactly to the designer&#194;s requirements in inductance, operating frequency and quality factor. The design process is significantly simplified and accelerated, as it is disentangled from the use of pre-characterized inductor libraries. The tool features on-the-fly layout synthesis, under an extensive set of constraints that make it possible to optimize inductor quality factor, shrink silicon real estate and minimize surrounding interconnect. Available within both schematic and layout environments, the interface is highly intuitive and extremely fast &#194; even for complex spiral types such as differential and transformer, the Spiral Wizard will generate a solution in a few seconds.</p><p>(PRWeb December 15, 2004)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2004/12/prweb188419.htm">http://www.prweb.com/releases/2004/12/prweb188419.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2004/12/prweb188419.htm</guid></item><item><title>Helic Joins the Cadence Connections Program</title><link>http://www.prweb.com/releases/2004/05/prweb127462.htm</link><pubDate>Fri, 21 May 2004 07:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. proudly announces that the company has joined the Cadence&#194;&#174; Connections&#194;&#174; program as an Emerging Solutions member. Through its membership, Helic will assure that the rapid modeling capabilities of its VeloceRF&#194; design tool work seamlessly with the Cadence Virtuoso&#194;&#174; custom design platform. VeloceRF helps designers to accelerate the development of complex RFICs and systems-in-package by enabling rapid, whole-chip electromagnetic modeling early in the design flow.</p><p>(PRWeb May 21, 2004)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2004/05/prweb127462.htm">http://www.prweb.com/releases/2004/05/prweb127462.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2004/05/prweb127462.htm</guid></item><item><title>Helic Joins the Cadence Connections Program</title><link>http://www.prweb.com/releases/2004/05/prweb127460.htm</link><pubDate>Fri, 21 May 2004 07:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. proudly announces that the company has joined the Cadence&#194;&#174; Connections&#194;&#174; program as an Emerging Solutions member. Through its membership, Helic will assure that the rapid modeling capabilities of its VeloceRF&#194; design tool work seamlessly with the Cadence Virtuoso&#194;&#174; custom design platform. VeloceRF helps designers to accelerate the development of complex RFICs and systems-in-package by enabling rapid, whole-chip electromagnetic modeling early in the design flow.</p><p>(PRWeb May 21, 2004)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2004/05/prweb127460.htm">http://www.prweb.com/releases/2004/05/prweb127460.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2004/05/prweb127460.htm</guid></item><item><title>Helic launches revolutionary EDA tool - enhances popular IC design flows to deliver first-pass RF IC and greatly reduced design cycles</title><link>http://www.prweb.com/releases/2003/12/prweb94211.htm</link><pubDate>Mon, 15 Dec 2003 08:00:00 GMT</pubDate><description> <![CDATA[  <p>Helic S.A. announces today the commercial release of VeloceRF&#194;, its revolutionary EDA tool that enhances popular industry design environments to enable delivery of first pass RF ICs and systems-in-package, significantly shortening the development cycle for complex wireless transceiver products. </p><p>(PRWeb December 15, 2003)</p><p>Read the full story at <a href="http://www.prweb.com/releases/2003/12/prweb94211.htm">http://www.prweb.com/releases/2003/12/prweb94211.htm</a></p>]]></description><guid isPermaLink="true">http://www.prweb.com/releases/2003/12/prweb94211.htm</guid></item></channel></rss>